计算机工程与科学2025,Vol.47Issue(12):2099-2107,9.DOI:10.3969/j.issn.1007-130X.2025.12.002
基于多元混合编码的SRAM数字存算一体宏设计
A multi-hybrid encoding digital compute-in-memory macro design
摘要
Abstract
Compute-in-memory(CIM)is considered a promising solution to overcome the"memory wall"bottleneck,enhancing energy efficiency and area efficiency significantly.This paper proposes a novel digital SRAM-based compute-in-memory macro architecture.It optimizes power consumption and enhances chip energy efficiency by means of hybrid encoding of weight data and activation data.Addi-tionally,a series of circuit-level optimizations are performed on the core adder tree circuit to improve the chip's area efficiency.Under TSMC's 28 nm process library,the proposed DCIM macro with hybrid en-coding optimization improves energy efficiency by 2.17 times at 0.9 V,250 MHz,using the ResNet20 test model.The adder tree optimization reduces 14.2%area in the overall DCIM macro.Finally,a 256×64 DCIM achieves an energy efficiency of 20.83 TOPS/W when processing the ResNet20 model.关键词
人工智能/SRAM/数字存算一体/混合编码/加法树优化Key words
artificial intelligence/SRAM/digital compute-in-memory/hybrid encoding/adder tree分类
信息技术与安全科学引用本文复制引用
GUO Ruiqi,YANG Zhuohang,CHEN Xiaofeng,WANG Lei,WANG Yang,HU Yang,YIN Shouyi..基于多元混合编码的SRAM数字存算一体宏设计[J].计算机工程与科学,2025,47(12):2099-2107,9.基金项目
国家重点研发计划(2023YFB4403100,2021ZD0114400) (2023YFB4403100,2021ZD0114400)
国家自然科学基金(62125403,92164301) (62125403,92164301)
新一代人工智能国家科技重大专项(2022ZD0115201) (2022ZD0115201)
北京市科技计划(Z221100007722023) (Z221100007722023)
北方集成电路技术创新中心(北京)有限公司横向项目(QYJS-2023-2801-B) (北京)