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基于ATE的多通道56 Gbps PAM4 SerDes接口电气参数测试方法

ZHANG Xia CAO Rui WANG Yongsheng LI Jiangtao DONG Chunlei

信息工程大学学报2025,Vol.26Issue(6):660-667,8.
信息工程大学学报2025,Vol.26Issue(6):660-667,8.DOI:10.3969/j.issn.1671-0673.2025.06.005

基于ATE的多通道56 Gbps PAM4 SerDes接口电气参数测试方法

Test Method for Electrical Parameters of Multi-Channel 56 Gbps PAM4 SerDes Interface Based on ATE

ZHANG Xia 1CAO Rui 1WANG Yongsheng 2LI Jiangtao 2DONG Chunlei1

作者信息

  • 1. Information Engineering University,Zhengzhou 450001,China
  • 2. Information Technology Innovation Center of Tianjin Binhai New Area,Tianjin 300357,China
  • 折叠

摘要

Abstract

The electrical parameter test of 56 Gbps PAM4 SerDes interface can ensure that the 56 Gbps PAM4 SerDes interface complies with relevant industry standards,guaranteeing seamless con-nection and collaborative operation among different devices.In view of the problem that the number of channels of standard test equipment is small and the efficiency of multi-channel 56 Gbps PAM4 SerDes interface electrical parameter test at the transmitting end and bit error rate test at the receiving end in the laboratory is very low,a multi-channel 56 Gbps PAM4 SerDes interface electrical parameter test method based on ATE is proposed.Utilizing the multi-channel high-speed test system(HSIO)inte-grated in the ATE automatic test equipment,a dedicated ATE test Load board is designed,and test pro-grams are written to rapidly achieve parallel testing of electrical parameters for multi-channel 56 Gbps PAM4 SerDes interfaces.Experiments demonstrate that the test efficiency is significantly improved,and the method can be applied to mass production testing of DUT chips.

关键词

多通道56 Gbps PAM4 SerDes/电气参数/误码率/测试载板

Key words

multi-channel 56 Gbps PAM4 SerDes/electrical parameters/bit error rate/test load board

分类

信息技术与安全科学

引用本文复制引用

ZHANG Xia,CAO Rui,WANG Yongsheng,LI Jiangtao,DONG Chunlei..基于ATE的多通道56 Gbps PAM4 SerDes接口电气参数测试方法[J].信息工程大学学报,2025,26(6):660-667,8.

基金项目

国家重点研发计划(2022YFB2901002) (2022YFB2901002)

信息工程大学学报

1671-0673

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