现代信息科技2026，Vol.10Issue(1)：17-21,5.DOI:10.19850/j.cnki.2096-4706.2026.01.004
搭载卷积神经网络加速模块的微处理器设计
Design of Microprocessor with Convolutional Neural Network Acceleration Module
摘要
Abstract
With the rapid development of current artificial intelligence technology,the demand for lightweight edge-side AI computing increases day by day.This paper proposes a Convolutional Neural Network(CNN)inference hardware acceleration scheme based on the collaboration between ARM and FPGA.Firstly,the scheme uses PyTorch on the host side to complete model training and quantization,and obtains weight and bias parameters.Secondly,it implements convolution,pooling,and fully connected operations in parallel on the FPGA,and interacts with the CPU through the AHB bus.Finally,tests are conducted on the PZ7020 development board.Experimental results show that the processor can accurately identify and analyze input images.This scheme provides an efficient and feasible technical path for edge-side AI inference in resource-constrained scenarios.关键词
PyTorch/CNN/FPGA/微处理器Key words
PyTorch/CNN/FPGA/microprocessor分类
信息技术与安全科学引用本文复制引用
黄彦涵..搭载卷积神经网络加速模块的微处理器设计[J].现代信息科技,2026,10(1):17-21,5.
