南京邮电大学学报（自然科学版）2026，Vol.46Issue(2)：48-55,8.DOI:10.14132/j.cnki.1673-5439.2026.02.006
薄层SOI结构电容-电压表征技术
Capacitance-voltage characterization of thin SOI
摘要
Abstract
As transistor dimensions continue to scale down,reducing the thickness of the active layer become increasingly critical,posing new challenges for extracting physical parameters using capacitance-voltage(C-V)methods.This paper proposes a non-destructive C-V characterization method for thin Silicon-on-insulator(TSOI)structures,using a series-connected virtual metal-oxide-semiconductor(MOS)structure.This approach begins by introducing a series method with virtual MOS structures to convert the C-V modeling of the TSOI structure into the modeling of two back-to-back virtual MOS structures.Subsequently,low-frequency and high-frequency C-V models are developed for both ideal and practical TSOI,based on the relationships among the silicon film thickness,depletion region width,Debye length,and inversion layer thickness.Numerical simulations performed with semiconductor device simulation software Synopsys TCAD validate the correctness and effectiveness of the proposed model.关键词
TSOI/硅膜厚度/电容-电压/虚拟MOS结构串联方法Key words
thin Silicon-on-insulator(TSOI)/Silicon film thickness/capacitance-voltage(C-V)/series connection method of virtual metal-oxide-semiconductor(MOS)structures分类
信息技术与安全科学引用本文复制引用
李曼,张欣怡,姚佳飞,张珺,杨可萌,郭宇锋..薄层SOI结构电容-电压表征技术[J].南京邮电大学学报（自然科学版）,2026,46(2):48-55,8.基金项目
国家自然科学基金(62334003,U23B2042)、江苏省科技成果转化项目(SJ223008)和南京市科技计划(202309003)资助项目 （62334003,U23B2042）
