集成电路与嵌入式系统2026，Vol.26Issue(5)：30-37,8.DOI:10.20193/j.ices2097-4191.2025.0100
融合XADC反馈与超时响应的JESD204B IP核优化设计
Optimized design of JESD204B IP core integrating XADC feedback and timeout response
摘要
Abstract
The stability of link establishment in the JESD204B interface protocol is a core prerequisite for ensuring the reliability of high-speed data communication,and it is vital for enhancing the performance of high-speed acquisition and transmission systems.To address the low link establishment success rates and inefficient fault localization of traditional JESD204B IP cores in harsh environments such as extreme high and low temperatures,this paper proposes an IP core optimization scheme to balance environmental adaptability and de-buggability.This scheme adopts a hierarchical optimization strategy,introducing an XADC temperature acquisition module into the JESD204_phy core to dynamically configure high-speed interface parameters based on real-time temperature ranges,thereby enhancing the link's resistance to temperature drift.Additionally,a link establishment timeout response module is added to the JESD204_core core,which avoids link blockage caused by timeouts through error type classification statistics and ordered reset control,and provides a quantitative basis for fault localization.A verification system architecture of"ADC+FPGA"for data acquisition and transmission is con-structed,and tests are conducted within a wide temperature range of-55℃to 125℃.The test results show that the link establish-ment success rate under extreme temperature conditions is improved by approximately 8%compared to the traditional scheme.Further-more,the optimized IP core effectively locates the cause of faults,verifying its high reliability and engineering practicality,which meets the high-speed data transmission requirements in harsh environments.关键词
JESD204B/IP核/链路建链/XADC/超时响应Key words
JESD204B/IP core/link establishment/XADC/timeout response分类
信息技术与安全科学引用本文复制引用
谢达,于宗光,范继聪,曹正州,单悦尔..融合XADC反馈与超时响应的JESD204B IP核优化设计[J].集成电路与嵌入式系统,2026,26(5):30-37,8.基金项目
国家重点研发项目课题工艺协同设计(STCO)方法研究—AI芯片的STCO方法验证(2024YFB4405405) （STCO）
江苏省自然科学基金前沿引领技术基础研究项目—跨维度、多功能功能异构集成芯粒基础技术研究(BK20232029) （BK20232029）
