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基于FPGA的滑轨试验数据记录器设计

王利斌 王博 李俊漾 黄强 胡鑫

舰船电子工程2026,Vol.46Issue(2):150-153,199,5.
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舰船电子工程2026,Vol.46Issue(2):150-153,199,5.DOI:10.3969/j.issn.1672-9730.2026.02.030

基于FPGA的滑轨试验数据记录器设计

Design of Sliding Rail Test Data Recorder Based on FPGA

王利斌 1王博 1李俊漾 2黄强 1胡鑫1

作者信息

  • 1. 北京强度环境研究所 北京 100076
  • 2. 中国海洋大学 青岛 266100
  • 折叠

摘要

Abstract

Traditional slide rail test recording equipment has problems such as poor compatibility with data buses,large instal-lation space,and difficulty in withstanding overload environments,making it difficult to meet the current requirements for flexibili-ty,reliability,and miniaturization of data acquisition in slide rail tests.A data recorder based on FPGA is designed to address these issues.The system uses FPGA as the main control unit,receives telemetry signals from fuses and real-time signal-to-noise ratio da-ta,performs real-time framing and storage of the data,and achieves data readback by configuring on-chip SelectIO resources.Avia-tion aluminum alloy is used as a protective shell for high load resistance.Ground tests have shown that the recorder can obtain data in an 11g overload impact environment and has the ability to adapt to multiple data bus interfaces,as well as the design require-ments of portability and miniaturization.

关键词

滑轨试验/记录器/FPGA/SelectIO

Key words

sliding rail test/recorder/FPGA/SelectIO

分类

信息技术与安全科学

引用本文复制引用

王利斌,王博,李俊漾,黄强,胡鑫..基于FPGA的滑轨试验数据记录器设计[J].舰船电子工程,2026,46(2):150-153,199,5.

基金项目

山东省自然科学基金青年项目(编号:ZR2022QF008)资助. (编号:ZR2022QF008)

舰船电子工程

1672-9730

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