电子科技2026，Vol.39Issue(6)：73-79,7.DOI:10.16180/j.cnki.issn1007-7820.2026.06.009
一种低硬件开销的Sigma-Delta DAC数字前端设计
Design and Implementation of A Digital Frontend for Sigma-Delta DAC with Low Hardware Overhead
摘要
Abstract
In view of the demand of the consumer market for DAC(Digital to Analog Converter)with high pre-cision and low resource consumption,a Sigma-Delta DAC digital front-end circuit with low hardware overhead is de-signed to minimize the use of hardware resources while maintaining high performance.The digital front end reduces hardware complexity and power consumption by adopting a multiplexed optimized upsampling filter design and an effi-cient modulation scheme.Data verification is carried out through simulation experiments,and verification and data a-nalysis are conducted on the FPGA(Field Programmable Gate Array)development board.The experimental results show that the Sigma-Delta DAC digital front-end design reduces the hardware overhead of the circuit while meeting the high-precision requirements.关键词
Sigma-Delta DAC/高精度/低硬件开销/复用优化/升采样滤波器/调制器/DWA/FPGAKey words
Sigma-Delta DAC/high-precision/low-resource consumption/multiplexer-optimized/upsampling filter/modulator/DWA/FPGA分类
信息技术与安全科学引用本文复制引用
钟晟,王法翔..一种低硬件开销的Sigma-Delta DAC数字前端设计[J].电子科技,2026,39(6):73-79,7.基金项目
福建省自然科学基金(2021J01585)Natural Science Foundation of Fujian(2021J01585) （2021J01585）
