集成电路与嵌入式系统2026，Vol.26Issue(7)：9-16,8.DOI:10.20193/j.ices2097-4191.2025.0139
基于CPU+FPGA SoC的卫星终端高速IP业务传输架构设计
Design of a high-speed IP transmission architecture for satellite terminals based on CPU+FPGA SoC
贺翔 1官权升 2林家群 3廖世文3
作者信息
- 1. 华南理工大学,广州 510641||广州海格通信集团股份有限公司,广州 510663
- 2. 华南理工大学,广州 510641
- 3. 广州海格通信集团股份有限公司,广州 510663
- 折叠
摘要
Abstract
Facing the processing performance bottleneck of current satellite communication terminals in high-throughput IP service sce-narios,this paper proposes a high-speed IP service transmission method based on a CPU+FPGA SoC architecture.The core of this method lies in the separation and cooperation of the control plane and the data plane.The functions required for high-speed data forwarding,such as IP access,route addressing,and link frame assembly/disassembly,are offloaded to the FPGA to form a high-performance data plane,control plane logic such as route maintenance and protocol interaction is handled by the CPU.Through key technologies of event-driven synchronization and hardware-level QoS scheduling,collaborative design challenges,including entry synchronization and low-la-tency signaling guarantee,are overcome.This achieves a significant performance leap on existing hardware,providing an effective solu-tion for the smooth performance upgrade of large-scale in-network satellite terminals and the design of compact,low-power terminals.关键词
卫星通信/IP传输/SoC/嵌入式系统/软硬件协同Key words
satellite communication/IP transmission/SoC/embedded system/hardware-software co-design分类
信息技术与安全科学引用本文复制引用
贺翔,官权升,林家群,廖世文..基于CPU+FPGA SoC的卫星终端高速IP业务传输架构设计[J].集成电路与嵌入式系统,2026,26(7):9-16,8.
