电子与封装2012，Vol.12Issue(7)：23-26,4.
LDMOS模型设计及参数提取
LDMOS Model Design and Parameter Extract
文燕1
作者信息
- 1. 深圳方正微电子有限公司,广东深圳518116
- 折叠
摘要
Abstract
In recent years, due to its drain, gate and source are on the chip surface, LDMOS is easy for lowvoltage device integration. So they have been widely used to power integrated circuits and radio frequency fields. All along, the high-voltage LDMOS modeling is a very complex issue. By analyzing the high-voltage LDMOS structure and physical properties, we obtain the quasi-saturation voltage, self-heating effect and the voltage-controlled resistance in drift region about LDMOS. These characteristics is similar to those of the JFET, thus we establish MOS＋JFET circuit model about high-voltage LDMOS devices. By designing a 1.0~tm 40V LDMOS model mask of CMOS process, we extract parameters. Experimental results show that the analytical solution of the model parameters consist with the measured values, but also reflects the inherent characteristics of LDMOS devices. Therefore, this new model can be a good guide of LDMOS device engineering applications.关键词
LDMOS/JFET/模型/漂移区Key words
LDMOS/JFET/model/drift-region分类
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文燕..LDMOS模型设计及参数提取[J].电子与封装,2012,12(7):23-26,4.
