电子与封装Issue(4)：17-19,48,4.
一种适于FPGA芯片的SRAM单元及外围电路设计
A SRAM Cell and Control Circuits Design for FPGA
徐新宇 1徐玉婷 1林斗勋1
作者信息
- 1. 中国电子科技集团公司第58研究所，江苏无锡214035
- 折叠
摘要
Abstract
SRAM cell power contributes a key part of the whole chip power consumption, and the simulation of a large scale of SRAM will cost long time. In the paper, present a SRAM cell with low leakage current for FPGA based on 40 nm technology, and also design write/read control circuit for the cell. The simulation result shows that the cell which present works with lower leakage current than normal threshold voltage CMOS SRAM. In particular, build the behavioral model of the SRAM cell and the other driving circuits using the Verilog language for the convenient of the whole chip simulation.关键词
SRAM单元设计/漏电电流/行为级模型Key words
SRAM design/leakage current/behavioral model分类
信息技术与安全科学引用本文复制引用
徐新宇,徐玉婷,林斗勋..一种适于FPGA芯片的SRAM单元及外围电路设计[J].电子与封装,2014,(4):17-19,48,4.
