电子与封装Issue(10)：25-29,5.
12位Sigma-Delta模数转换器的降采样滤波器设计
Decimation Filter Design for 12-bit Sigma-Delta ADC
黄博志1
作者信息
- 1. 福州瑞芯微电子有限公司，福州 350003
- 折叠
摘要
Abstract
The paper presents a signal-noise-ratio (SNR) based design method for the decimation filter of a 12-bit Sigma-Delta ADC (analog-to-digital converter). Sigma-Delta ADC consists of Sigma-Delta modulatorand decimation filter. Sigma-Delta modulatoris used for signal modulation and over-sampling quantization. Decimation filter is used for down-sampling the digital signal to its normal frequency and the quantization noise is filtered at the same time. Sigma-Delta ADC has higher sampling frequency, higher precision and less hardware cost than traditional ADC. There are two specifications for decimation filter:down-sampling rate and filter performance. This filter design method is driven by SNR and two solutions are applied. Simulation is done using MATLAB and the result is met the requirement of 12-bit Sigma-Delta ADC with SNR larger than 74 dB.关键词
信噪比/Sigma-Delta模数转换器/降采样滤波器Key words
SNR/Sigma-Delta ADC/Decimation filter分类
信息技术与安全科学引用本文复制引用
黄博志..12位Sigma-Delta模数转换器的降采样滤波器设计[J].电子与封装,2014,(10):25-29,5.
