电子与封装2023，Vol.23Issue(12)：14-19,6.DOI:10.16257/j.cnki.1681-1070.2023.0172
Flash型FPGA内嵌BRAM测试技术研究
Research on Test Technology of Embedded BRAM in Flash-Based FPGA
雷星辰 1季伟伟 2陈龙 2韩森2
作者信息
- 1. 电子科技大学(深圳)高等研究院,广东深圳 518110||中国电子科技集团公司第五十八研究所,江苏无锡 214035
- 2. 中国电子科技集团公司第五十八研究所,江苏无锡 214035
- 折叠
摘要
Abstract
Flash-based FPGAs are widely used in military and aerospace fields due to their high reliability,excellent security and plug-and-play functionality.Internal structures of Flash-based FPGAs are complex and bulky,so it is crucial to study the reliability and accuracy of their test technologies.Block random access memory(BRAM),as an important internal storage module of FPGA,has the problem of low fault coverage in traditional tests.In order to expand the coverage of faults,the March C+algorithm is improved,and the optimized algorithm significantly improves the detection ability of write disturb fault(WDF),write destructive coupling fault(CFwd),disturb coupling fault(CFds)and intra-word coupling fault.The results show that the optimized algorithm improves the fault coverage by 25 percentage points compared to the March C+algorithm and by 5.8 percentage points compared to the March SS algorithm with the same time complexity.关键词
Flash 型 FPGA/March C+算法/BRAMKey words
Flash-based FPGA/March C+algorithm/BRAM分类
信息技术与安全科学引用本文复制引用
雷星辰,季伟伟,陈龙,韩森..Flash型FPGA内嵌BRAM测试技术研究[J].电子与封装,2023,23(12):14-19,6.
