电子与封装2024，Vol.24Issue(1)：30-34,5.DOI:10.16257/j.cnki.1681-1070.2024.0012
时钟缓冲器附加抖动分析
Analysis of Additive Jitter in Clock Buffers
陈文涛 1邵海洲 1胡劲涵1
作者信息
- 1. 中国电子科技集团公司第五十八研究所,江苏无锡 214035
- 折叠
摘要
Abstract
Additive jitter is a key indicator for clock buffers.The theoretical derivation of the additive jitter calculation formula from the perspective of phase noise is carried out,and the correctness of the additive jitter calculation formula is proved.Through the actual tests of the clock buffers,the derivation of the additive jitter calculation formula is verified from the perspective of actual measurements.Combined with the calculation formula for additive jitter,precautions in the additive jitter test of clock buffers are provided to ensure the accuracy of the test results.关键词
附加抖动/相位噪声/时钟缓冲器Key words
additive jitter/phase noise/clock buffers分类
信息技术与安全科学引用本文复制引用
陈文涛,邵海洲,胡劲涵..时钟缓冲器附加抖动分析[J].电子与封装,2024,24(1):30-34,5.
