Flash片内数据的高速回读系统设计OACSTPCD

Aiming at the problem that part of the interface of the missile post-flight data recording device is damaged and the flight data cannot be read back smoothly.A Flash read-write device that can read back the data in the memory chip at a high speed is developed,and a high-speed parallel transceiver link with a rate of 1.562 5 Gb/s per channel is designed by using Aurora protocol on the basis of the built-in LVDS transceiver in FPGA,and an alternate serial readout link with a low transmission rate is designed on the basis of serial par-allel conversion.Both the high-speed reading interface and the standby reading interface can transmit the data in the Flash chip to the test table for evaluation and utilization without losing frames.It has the features of simple hardware design,convenient and fast reading back data.