集成电路与嵌入式系统2024，Vol.24Issue(2)：81-85,5.
Flash片内数据的高速回读系统设计
Design of high-speed data read back system in Flash
李晴爽 1文丰 1李辉景1
作者信息
- 1. 中北大学电子测试技术国家重点实验室,太原 030051
- 折叠
摘要
Abstract
Aiming at the problem that part of the interface of the missile post-flight data recording device is damaged and the flight data cannot be read back smoothly.A Flash read-write device that can read back the data in the memory chip at a high speed is developed,and a high-speed parallel transceiver link with a rate of 1.562 5 Gb/s per channel is designed by using Aurora protocol on the basis of the built-in LVDS transceiver in FPGA,and an alternate serial readout link with a low transmission rate is designed on the basis of serial par-allel conversion.Both the high-speed reading interface and the standby reading interface can transmit the data in the Flash chip to the test table for evaluation and utilization without losing frames.It has the features of simple hardware design,convenient and fast reading back data.关键词
数据回读/Aurora协议/Flash读写/FPGAKey words
data read back/Aurora protocol/Flash read and write/FPGA分类
信息技术与安全科学引用本文复制引用
李晴爽,文丰,李辉景..Flash片内数据的高速回读系统设计[J].集成电路与嵌入式系统,2024,24(2):81-85,5.
