计算机工程与科学2024，Vol.46Issue(6)：959-967,9.DOI:10.3969/j.issn.1007-130X.2024.06.002
基于Actor模型的众核数据流硬件架构探索
Exploration of the many-core data flow hardware architecture based on Actor model
张家豪 1邓金易 1尹首一 1魏少军 1胡杨1
作者信息
- 1. 清华大学集成电路学院,北京 100084
- 折叠
摘要
Abstract
The distributed training of ultra-large-scale AI models poses challenges to the communica-tion capability and scalability of chip architectures.Wafer-level chips integrate a large number of compu-ting cores and inter-connect networks on the same wafer,achieving ultra-high computing density and communication performance,making them an ideal choice for training ultra-large-scale AI models.AM-CoDA is a hardware architecture based on the Actor model,aiming to leverage the highly parallel,asyn-chronous message passing,and scalable characteristics of the Actor parallel programming model to a-chieve distributed training of AI models on wafer-level chips.The design of AMCoDA includes three levels:computational model,execution model,and hardware architecture.Experiments show that AMCoDA extensively supports various parallel patterns and collective communications in distributed training,flexibly and efficiently deploying and executing complex distributed training strategies.关键词
晶圆级芯片/分布式训练/Actor模型/众核数据流架构Key words
wafer-level chip/distributed training/Actor model/many-core dataflow architecture分类
信息技术与安全科学引用本文复制引用
张家豪,邓金易,尹首一,魏少军,胡杨..基于Actor模型的众核数据流硬件架构探索[J].计算机工程与科学,2024,46(6):959-967,9.
