电子与封装2024，Vol.24Issue(6)：44-49,6.DOI:10.16257/j.cnki.1681-1070.2024.0107
面向大算力应用的芯粒集成技术
Chiplet Integration Technology for High Computing Power Application
王成迁 1汤文学 2戴飞虎 2丁荣峥 2于大全3
作者信息
- 1. 中国电子科技集团公司第五十八研究所,江苏无锡 214035||厦门大学电子科学与技术学院,福建厦门 361005
- 2. 中国电子科技集团公司第五十八研究所,江苏无锡 214035
- 3. 厦门大学电子科学与技术学院,福建厦门 361005
- 折叠
摘要
Abstract
As advanced manufacturing processes approach physical limits,Moore's Law can no longer meet the demand for high computing power in artificial intelligence.Chiplet technology is widely recognized as the most effective method to continue Moore's Law and enhance chip computing power.In view of the research hotspots of Chiplet technology,the application and development of integrated chips,typical Chiplet packaging technologies,and challenges and opportunities of Chiplet technology are systematically reviewed.The current application achievements of Chiplet technology are detailed,and the characteristics of 2.5D,3D stack,and 3D FO packaging technologies are analyzed.关键词
大算力/芯粒/芯粒封装/摩尔定律Key words
high computing power/Chiplet/Chiplet packaging/Moore's Law分类
信息技术与安全科学引用本文复制引用
王成迁,汤文学,戴飞虎,丁荣峥,于大全..面向大算力应用的芯粒集成技术[J].电子与封装,2024,24(6):44-49,6.
