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集成电路互连微纳米尺度硅通孔技术进展

黎科 张鑫硕 夏启飞 钟毅 于大全

电子与封装2024,Vol.24Issue(6):111-120,10.
电子与封装2024,Vol.24Issue(6):111-120,10.DOI:10.16257/j.cnki.1681-1070.2024.0144

集成电路互连微纳米尺度硅通孔技术进展

Advances in Micro-and Nano-Scale TSV Technology for Integrated Circuit Interconnecting

黎科 1张鑫硕 2夏启飞 2钟毅 1于大全3

作者信息

  • 1. 厦门大学电子科学与技术学院,福建厦门 361005
  • 2. 厦门大学化学化工学院,福建厦门 361005
  • 3. 厦门大学电子科学与技术学院,福建厦门 361005||厦门云天半导体科技有限公司,福建厦门 361013
  • 折叠

摘要

Abstract

The integrated circuit interconnecting micro-and nano-scale through silicon via(TSV)technology has become the key to driving chips to sustained high-computing power in the post-Moore's Law era.By introducing micro-and nano-scale high depth-to-width ratio TSV structures,the 2.5D/3D integration technology facilitates higher density,higher performance 3D interconnects.At the same time,the implementation of nano-scale TSV technology for backside power delivery in integrated circuits can effectively solve the bottleneck caused by wiring resource conflict between current signal and power delivery networks,and improve the power efficiency and overall performance.With continual innovations in material processes and equipment technologies,micro-and nano-scale TSV technology has made significant progress in some areas,offering critical support for the development of future high-performance and low-power integrated circuits.The current mainstream micro-and nano-scale TSV technologies in the industry are reviewed,and their structural characteristics and key technologies are analyzed and summarized,while the development trends and challenges of TSV technologies are discussed.

关键词

先进互连技术/2.5D/3D芯粒集成/背面供电/高深宽比TSV

Key words

advanced interconnecting technology/2.5D/3D Chiplet integration/backside power delivery/high depth-to-width ratio TSV

分类

信息技术与安全科学

引用本文复制引用

黎科,张鑫硕,夏启飞,钟毅,于大全..集成电路互连微纳米尺度硅通孔技术进展[J].电子与封装,2024,24(6):111-120,10.

基金项目

国家自然科学基金(62104206) (62104206)

中央高校基本科研业务费专项资金(20720220072) (20720220072)

电子与封装

1681-1070

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