一种高速多级全差分放大器设计OA北大核心CSTPCD

A high-bandwidth low-noise fully differential amplifier was proposed with complementary bipolar technology,which can realize fully differential or single-ended-to-differential conversion.A novel H-bridge input structure was proposed to achieve a high slew rate and low distortion.Furthermore,the amplifier utilized an internal common-mode feedback loop to feedback the common-mode signal to two gain stages,enabling adjustment of the differential output's common-mode level.This feature made the high-speed,fully differential amplifier particularly suitable for buffering and amplifying the input signals of high-speed and high-precision analog-to-digital converters(ADCs).The amplifier incorporated a transconductance linearization loop in the Class AB output stage,providing effective biasing to reduce distortion and ensure a high dynamic range.The circuit and layout design of the amplifier were performed using EDA tools.The post-layout simulation results show that with a±5 V power supply,the amplifier achieves a-3 dB bandwidth of 366 MHz,a slew rate greater than 1150 V/ps,an input voltage noise below 10 nV/√Hz,and an input offset voltage within±1 mV.