基于对差分结构的320GHz三倍频器OA北大核心CSTPCD

A 320 GHz balanced frequency tripler based on face-to-face differential configuration has been demonstrated without any on-chip capacitor.The proposed circuit could increase the power handling by a factor of two compared to the traditional balanced ones without any decline in efficiency.To improve the simulation accuracy under high dissipated power level,an accurate self-consistent electro-thermal model has been implemented using the symbolically defined device(SDD)component during the harmonic balance simulation.The fabricated tripler has proved that driven by powers ranging from 123 to 200 mW,the maximum output power and conversion efficiency can be 17.27 mW and 8.8%at 309.6 GHz,respectively.Moreover,the tripler reaches a peak output power of 27.33 mW with 7.2%conversion efficiency when driven from 305 to 384 mW.This configuration manifests a prospective solution for high-power multipliers,facilitating the application in various fields such as terahertz high-speed communication,radar imaging,and astronomical observation in the future.