基于MLIR的数据流模型OA北大核心CSTPCD

Thanks to the instruction set architecture(ISA),the software community and the hard-ware community has been developing independently for years.However,with the advent of multi-core accelerators,the sequential programming model based on the Von Neumann architecture is confronted with troubles.Based on sequential execution model,ISA lacks support for parallel multi-core hardware.Thus,merely using ISA cannot decouple software and hardware.A new program execution model(PXM)is required to accomplish end-to-end compilation from neural networks to interface with sequen-tially executed programming platforms and parallel multi-core hardware backends,further exploring the optimization opportunities provided by parallel hardware.This paper proposes a codelet model as a new PXM,providing a general abstraction for the process of downloading sequentially executed programs on-to parallel hardware.It further decouples the software frontend and hardware backend based on the in-struction set.To ensure the reusability of the project,this paper implements the codelet model in the form of a codelet dialect within the MLIR compiler framework proposed by Google.MLIR aims to in-tegrate fragmented compiler ecosystems and improve the reusability of frontend-to-backend integration processes.The codelet model implemented in MLIR in this paper can further enhance the reusability of the MLIR system.