电子与封装2024，Vol.24Issue(8)：16-20,5.DOI:10.16257/j.cnki.1681-1070.2024.0089
基于晶圆级封装PDK的微带发夹型滤波器设计
Design of Microstrip Hairpin Filter Based on Wafer Level Packaging PDK
孙莹 1周立彦 1王剑峰 1许吉 2明雪飞 3王波1
作者信息
- 1. 无锡中微高科电子有限公司,江苏无锡 214035
- 2. 杭州电子科技大学射频电路与系统教育部重点实验室,杭州 310000
- 3. 中科芯集成电路有限公司,江苏无锡 214072
- 折叠
摘要
Abstract
Based on the wafer level packaging process and process design kit(PDK)of the China Electronics Technology Group Corporation No.58 Research Institute,the design and optimization of several 5-order microstrip hairpin filters with the passband range of 20～68 GHz are completed.Firstly,based on the basic theory of parallel coupling filter,the characteristic sizes of the hairpin filters are calculated.Secondly,the substrate and component models in PDK are invoked to realize the fast modeling and parameter optimization of the filters.Finally,the designed hairpin filters are processed using multi-layer rewiring technology.The high consistency between the measured results and the simulation results verifies the application value of the wafer level packaging PDK,which can provide a new tool choice for passive filter integration design.关键词
晶圆级封装/PDK/发夹型滤波器Key words
wafer level packaging/PDK/hairpin filter分类
信息技术与安全科学引用本文复制引用
孙莹,周立彦,王剑峰,许吉,明雪飞,王波..基于晶圆级封装PDK的微带发夹型滤波器设计[J].电子与封装,2024,24(8):16-20,5.
