电子元件与材料2025，Vol.44Issue(3)：278-284,7.DOI:10.14106/j.cnki.1001-2028.2025.1422
一种被动传输剩余电压的高速SAR ADC
A high speed SAR ADC based on passive residual-voltage transmission
李新 1王扬 1杨森林2
作者信息
- 1. 沈阳工业大学信息科学与工程学院,辽宁沈阳 110870
- 2. 深致芯微电子(上海)有限公司,上海 201203
- 折叠
摘要
Abstract
To address the bandwidth and mismatch problems caused by residual amplifiers in traditional two-step successive approximation analog-to-digital converters(SAR ADC),an 8 bit_450 MSPs high-speed two-step SAR ADC with passive residual-voltage transmission was proposed.The first-stage analog-to-digital converter(ADC)transmits the residual signal directly to the second-stage ADC without attenuation during the coarse conversion of the signal.Therefore,the use of residual amplifiers was avoided.The time and power consumption,which were caused by the traditional two-step structure to amplify the residual signal,were reduced.And the bandwidth mismatch caused by the residual amplifier mismatch was avoided,too.The continuity of the circuit was ensured by using two second-stage sub-ADCs working in ping-pong mode.As for Sub-ADCs,capacitor-split capacitor-integer digital-to-analog converter(CDAC)and multi-comparator architecture were used to further increase the conversion speed.Based on 40 nm BCD and 1.1 V supply voltage,the ADC achieves a sample rate of 450 MSPs,a signal-to-noise ratio(SNR)of 51.8 dB,a signal-to-noise distortion ratio(SNDR)of 46.5 dB,a spurious-free dynamic range(SFDR)of 59.8 dB and a power consumption of 2.44 mW.关键词
逐次逼近型模数转换器/二步式ADC/剩余电压/电容分裂CDAC/动态比较器Key words
successive approximation analog-to-digital converter/two-step ADC/residual voltage/capacitor splitting CDAC/dynamic comparator分类
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李新,王扬,杨森林..一种被动传输剩余电压的高速SAR ADC[J].电子元件与材料,2025,44(3):278-284,7.
