电子元件与材料2025，Vol.44Issue(4)：408-415,8.DOI:10.14106/j.cnki.1001-2028.2025.1434
一种低功耗环路复用的LDO
A low power loop-multiplexed LDO
摘要
Abstract
To further reduce the area and power consumption of the on-chip power supply circuits,a capacitor-less low-power loop-multiplexed low-dropout regulator(LLM-LDO)circuit was proposed in this paper.First,the output voltage was determined only by the bandgap core and resistor ratio and the external reference was not required.Second,the bandgap core and the LDO system loop shared the same error amplifier,thereby reducing the area and power consumption of the circuit.Finally,the LLM-LDO system exhibited approximately as a single-pole system behavior within the unit-gain bandwidth,enabling stable power rails without an off-chip capacitor.The performance parameters of the system were verified through simulations based on an 180 nm BCD process.The static current of the system is 8.5 μA,and the line regulation is 0.18 μV/V.Within the load current variation range from 10 μA to 100 mA,the load regulation is 1.9 μV/mA.The minimum phase margin of the system is 71.4°,the PSR at 100 Hz is-121 dB,and the maximum start-up time of the system is 39.6 ps.关键词
低功耗/环路复用/无片外电容LDO/环路稳定性/电源抑制Key words
low power/loop-multiplexed/capacitor-less LDO/loop stability/power supply rejection分类
信息技术与安全科学引用本文复制引用
童洒洒,喻思禹,郑孝辰,刘欣洋,周泽坤..一种低功耗环路复用的LDO[J].电子元件与材料,2025,44(4):408-415,8.基金项目
国家自然科学基金(62074028) （62074028）
四川省自然科学基金(23NSFSC0359) （23NSFSC0359）
教育部春晖合作科研计划(HZKY20220583) （HZKY20220583）
中央高校和科研机构重大科技成果转化重大项目(2022ZHCG0117) （2022ZHCG0117）
