电子与封装2025，Vol.25Issue(11)：34-40,7.DOI:10.16257/j.cnki.1681-1070.2025.0151
基于硅转接板的2.5D封装中电源地平面研究和优化
Research and Optimization of Power and Ground Planes in 2.5D Packaging Based on Silicon Interposer
陈龙 1宋昌明 1周晟娟 2章莱 3王谦 4蔡坚4
作者信息
- 1. 清华大学集成电路学院,北京 100084
- 2. 上海清华国际创新中心,上海 200333
- 3. 北京芯力技术创新中心有限公司,北京 100176
- 4. 清华大学集成电路学院,北京 100084||北京信息科学与技术国家研究中心,北京 100084
- 折叠
摘要
Abstract
Aiming at the power integrity issues of large impedance of the power delivery network(PDN)and large system voltage noise in the 2.5D packaging based on the silicon interposer,a 2.5D packaging model is established for studying and optimizing the power integrity of the packaging system.A method of collaborative simulation of three-dimensional electromagnetic fields and circuits is adopted to optimize the impedance of the power and ground planes on the silicon interposer.System impedance is optimized and voltage noise is reduced by reasonably selecting and arranging deep trench capacitors(DTCs).The results show that increasing the wiring density of the power and ground planes can effectively reduce the impedance of the PDN.There is an optimization lower limit for the line width/line spacing of the power and ground planes.When the line width/line spacing is less than twice the line width of the signal lines,it will have an adverse effect of impedance discontinuity on the die-to-die interconnect signal lines.In the established model,the DTCs are selected according to the high-frequency resonance peaks of the PDN impedance,reducing the PDN impedance by approximately 83％and decreasing the voltage noise by about 42％.At the same time,the integration of DTCs will introduce new resonance peaks in the medium and high frequency bands,which has an adverse effect of large impedance on the PDN.关键词
2.5D封装/硅转接板/电源完整性/电源地平面/深槽电容Key words
2.5D packaging/silicon interposer/power integrity/power and ground planes/deep trench capacitor分类
信息技术与安全科学引用本文复制引用
陈龙,宋昌明,周晟娟,章莱,王谦,蔡坚..基于硅转接板的2.5D封装中电源地平面研究和优化[J].电子与封装,2025,25(11):34-40,7.
