电子与封装2026，Vol.26Issue(5)：39-45,7.DOI:10.16257/j.cnki.1681-1070.2026.0046
一种超低过冲电压的低功耗LDO电路设计
Design of a Low-Power LDO Circuit with Ultralow Overshoot Voltage
任罗伟 1袁介燕 1冯建飞 1高灿灿1
作者信息
- 1. 无锡中微爱芯电子有限公司,江苏无锡 214072
- 折叠
摘要
Abstract
Based on the 0.18 μm BCD process,a low-power low-dropout linear regulator(LDO)circuit is designed and implemented.To address the significant output voltage overshoot issue during rapid power-on after shutdown,an optimization method is proposed.On the basis of the LDO input-stage structure,a startup circuit module is added to generate a startup signal.When the chip powers on,the startup circuit produces a high-level pulse signal,turning on the startup transistor,increasing the tail current of the operational amplifier,thereby enhancing its response speed and reducing output overshoot.Experimental results show that this method reduces the output overshoot from 3.406 V to about 0.297 V,effectively mitigating the output voltage overshoot and significantly improving the transient response performance and overall reliability of the LDO circuit.关键词
稳压器/低功耗/输出电压过冲/启动电路Key words
voltage regulator/low-power/output voltage overshoot/startup circuit分类
信息技术与安全科学引用本文复制引用
任罗伟,袁介燕,冯建飞,高灿灿..一种超低过冲电压的低功耗LDO电路设计[J].电子与封装,2026,26(5):39-45,7.
