电子元件与材料2026，Vol.45Issue(8)：943-950,8.DOI:10.14106/j.cnki.1001-2028.2026.0039
一种低压低温漂高PSRR带隙基准设计
A low-voltage,low-temperature-drift,and high-PSRR bandgap reference design
摘要
Abstract
A low-voltage,low-temperature-drift,and high-PSRR bandgap reference was presented to meet the demand for reference voltage sources with low supply voltage,high temperature stability,and strong anti-interference capability against supply fluctuations.An improved current-mode bandgap architecture was adopted to generate a stable 600 mV reference voltage,and a high-order temperature compensation technique was introduced to suppress temperature drift.To further enhance the power supply rejection performance,a two-stage folded-cascode error amplifier with differential input and single-ended output was designed.The proposed circuit was implemented in the SMIC 0.18 μm CMOS process and verified via Cadence Spectre simulations.The simulated results showed that the circuit provided a stable 600 mV reference voltage with the supply voltage ranging from 1.2 V to 3.4 V.At a 1.8 V supply voltage,the temperature coefficient was 1.74×10-6/℃ over the temperature range of-45℃ to 150℃,the line regulation was lower than 0.099％/V,the PSRR reached-81.37 dB at 1 kHz,and the total power consumption was 720 μW.The proposed bandgap reference exhibits excellent low-voltage operating capability,superior temperature stability,and high immunity to power supply disturbances.关键词
带隙电压基准/折叠式共源共栅/温度系数/电源抑制比/线性调整率Key words
bandgap voltage reference/folded cascode/temperature coefficient/PSRR/line regulation分类
信息技术与安全科学引用本文复制引用
汤裕玲,武华,曾慧楠,胡涛,曹先国..一种低压低温漂高PSRR带隙基准设计[J].电子元件与材料,2026,45(8):943-950,8.基金项目
国家自然科学基金(61650404) （61650404）
江西省自然科学基金(20242BAB20062) （20242BAB20062）
江西省教育厅科技项目(GJJ211436) （GJJ211436）
