Influence of gate-source/drain misalignment on the performance of bulk FinFETsby a 3D full band Monte Carlo simulationOACSCDCSTPCD
Influence of gate-source/drain misalignment on the performance of bulk FinFETsby a 3D full band Monte Carlo simulation
Wang Juncheng;Du Gang;Wei Kangliang;Zeng Lang;Zhang Xing;Liu Xiaoyan
Institute of Microelectronics, Peking University, Beijing 100871, ChinaInstitute of Microelectronics, Peking University, Beijing 100871, ChinaInstitute of Microelectronics, Peking University, Beijing 100871, ChinaInstitute of Microelectronics, Peking University, Beijing 100871, ChinaInstitute of Microelectronics, Peking University, Beijing 100871, ChinaInstitute of Microelectronics, Peking University, Beijing 100871, China
bulk FinFET gate-source/drain misalignment 3D Monte Carlo simulation carrier transport
bulk FinFET gate-source/drain misalignment 3D Monte Carlo simulation carrier transport
《半导体学报(英文版)》 2013 (4)
42-45,4
Project supported by the National Fundamental Basic Research Program of China (No.2011CBA00604).
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