电磁脉冲应力下MOSFET器件退化机制研究OACSTPCD

In response to issues such as abnormal degradation of chip performance caused by electromagnetic pulses in power application scenarios,and unclear failure mechanisms of devices such as MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistors)within the chip,TLP(Transmission Line Pulse)pulses,with amplitude and width of 8 V and 100 ns,are applied into gate oxide layer of 5 V NMOS devices.The output characteristic curves Id-Vd and the transfer characteristic curves Id-Vg under different pulse cycles are measured.By calculating the device transconductance under different TLP number,the threshold voltage VT and carrier mobility with TLP pulse are obtained.The test results show that under the same drain voltage Vd and gate voltage Vg,the drain current Id of the device increases with the increase of the number of TLP pulses.TLP pulses cause a significant decrease of VT,which decreases by about 25.66％under 20 000 TLP pulses,TLP pulses caused the VT of the device to increase exponentially,and the fitting index is between 0.11～0.15.The influence of TLP pulses on the carrier mobility in the channel is not obvious.